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Flash Memory Controller
6.4
Flash memory maps
The flash module is partitioned into two spaces in memory. The first is the array memory which contains
the main flash array. The second area allows supervisor access to module registers and is mapped into the
16-bit, IP-bus space. User access to the flash controller is via dedicated ROM functions. Direct user access
to the controller register set is prohibited.
6.4.1
Array memory map
The main flash array is designed to support 16 KB of general program storage. Four bytes of this are
reserved for use in storing non-volatile parameters.
Table 6-1. Flash array memory map
Address range
(00) 00_0000 – (00) 00_3FFB
16380 (16K - 4) bytes
(00) 00_3FFC – (00) 00_3FFF
4 bytes
Function
General storage
Reserved for nonvolatile options (4 bytes)
FOPT[7:0] is loaded from address 0x3FFF during each reset sequence.
The boot-to-flash flag (FOPT[FB]) is set to the inverse of Bit 5 of address 0x3FFE during the ROM
boot process on power-on-reset. Thus, if Bit 5 of 0x3FFE is set to “1,” the device will not boot to flash.
As a consequence, a virgin device with erased flash will boot directly into the ROM command interpreter
on power-up.
Similarly, the FOPT[9:8] bits are loaded from bits [1:0] of 0x3FFE during the POR boot sequence by the
ROM bootloader.
MMA955xL Intelligent, Motion-Sensing Platform Hardware Reference Manual, Rev. 1.0
64
Freescale Semiconductor, Inc.
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